Subsetting Behavioral Intellectual Property for Low Power ASIP Design

GOALS System level design involves a series of tradeoffs in determining the best way to implement a particular task in the hardware/software design space. ASIC implementations can be optimized for a variety of parameters including execution speed, throughput, or power consumption, but do not offer any flexibility as far as future applications are concerned. This inflexibility often leads to lower volumes and therefore higher per unit costs. At the other end of the design spectrum are software implementations running on general purpose processors (GPs). The processor’s hardware may not be optimized for any particular performance parameter, but offers support for a wide range of applications by its reprogrammability. This flexibility allows design costs to be amortized over a large number of chips.